perm filename WLIST.V[1,VDS] blob
sn#299712 filedate 1976-11-29 generic text, type C, neo UTF8
COMMENT ⊗ VALID 00033 PAGES
C REC PAGE DESCRIPTION
C00001 00001
C00003 00002 ARM-COMPUTER INTERFACE FOR PDP-11 AND LSI 11 COMPUTERS
C00006 00003 BIT ASSIGNMENTS - USING DRV-11 or DR-11C
C00012 00004 PRELIMINARIES
C00014 00005 COMPONENTS REQUIRED
C00015 00006 ANALOG POWER
C00017 00007 OUT 00 B
C00018 00008 OUT 05 B
C00019 00009 OUT 10 B
C00020 00010 STOP A
C00021 00011 BRAKE OUT
C00022 00012 MODE BUFFERS
C00023 00013 LD DACS
C00024 00014 LOAD DACS
C00025 00015 INT CTRL[TOL]
C00026 00016 GNDS
C00027 00017 ONE-SHOT TIMING
C00028 00018 AD OUTPUTS
C00029 00019 MPXR ADDRS
C00030 00020 MPXR OUT[ANALOG]
C00031 00021 MISC. WRAPS
C00032 00022 CONNECTOR WIRING -P2
C00036 00023 CONNECTOR WIRING -P3
C00039 00024 CONNECTOR WIRING -P1
C00041 00025 CONNECTOR WIRING -P4
C00042 00026 DAC CONNECTIONS -D0
C00043 00027 DAC CONNECTIONS -D1
C00044 00028 DAC CONNECTIONS -D2
C00045 00029 DAC CONNECTIONS -D3
C00046 00030 DAC CONNECTIONS -D4
C00047 00031 DAC CONNECTIONS -D5
C00048 00032 DAC CONNECTIONS -D6
C00049 00033 DAC CONNECTIONS -D7
C00050 ENDMK
C⊗;
ARM-COMPUTER INTERFACE FOR PDP-11 AND LSI 11 COMPUTERS
INTRODUCTION
This wire list is for a single board computer interface
for a DEC PDP-11 series computer. It is intended to be used
with a DEC DR-11C or DRV-11 general device interface card.
The computer is interfaced thru two 40 pin connectors.
The arm is interfaced thru two 50 pin connectors.
The interface contains a 12 bit A/D (+-10vdc), 32 channels of
multiplexing, and a buffer amplifier for reading analog signals.
There are also 8 12 bit DACs (+-10vdc output) foroutputting analog
signals to the arm.
The interface can read binary (TTL levels) from the arm- Touch and
Tolerance bits plus Panic.
The interface can set the arm servo mode with 8 Mode bits of output.
The interface can output 10 binary bits (brake bits) to the arm.
Interrupts can be obtained on the AND of all Tolerance Bits and on the
OR of Touch and Panic Bits.
Power requirements are +-15vdc, and +5vdc.
Power enters the board by the DEC edge pins. The following pins
are assigned for this purpose
GND- CC2, DC2, EC2, FC2, CT1, DT1, ET1, FT1
+5- CA2, DA2, EA2, FA2
+15- DH1, FH1
-15- DE1, FE1
Other reserved pins are CC1, DC1, DD2 to and including DR2.
All other edge pins are avaliable for backplane signals, etc.
BIT ASSIGNMENTS - USING DRV-11 or DR-11C
The DEC DRV-11 has three registers- A Status Register, An Output Data
Register, and An Input Data Register. These registers have the
following addresses:
For the arm interface
167760 -Status
167762 -Output (Load Functions)
167764 -Input (Read Functions)
Register addresses can be changed in steps of 10(octal) from these
base addresses, by altering jumpers on the DEC board.
The VICARM interface is designed to use this DEC type of interface
card.
Two 40 conductor cables connect the Vicarm Interface to the DEC card.
The Vicarm interface operates in various modes, all under computer
control. This is done by setting the proper CSR bits in the Status
Register.
A list of CSR Bits and Function Follows.
FUNCTION CSR0 CSR1 REGISTER
15 12 9 6 3 0
-----------------------------------------
Load DACs 0 0 |3bit addr|mode| 12bits DAC data |
-----------------------------------------
-----------------------------------------
Load Brakes 1 0 |3bits spare|6bits control|7bits brakes |
-----------------------------------------
-----------------------------------------
Load A/D channel no. 0 1 | 11 bits spare |5bits A/D chn |
-----------------------------------------
-----------------------------------------
Read a/d 0 1 |4bits spare| 12 bits A/D data |
-----------------------------------------
-----------------------------------------
Read Sensors and Bits 1 1 |8bits tolerance|1bit STOP|7bits sensors |
-----------------------------------------
Load Encoders 1 1 (Encoder option only)
Read Encoders 1 0 (Encoder option only)
All output (load) functions take place when the NEW DATA READY signal
comes up indicating the output buffer register has been loaded with
the output data. The OUTPUT REGISTER contents are listed above.
Input (read) functions take place when the Vicarm Interface generated
REQ A bit comes up. The DR11-C returns a DATA TRANSMITTED pulse when
it has read the data. This resets the REQ A flag. The INPUT REGISTER
contents are listed above. (For arm, Interrupt A address is 310, and
Interrupt B address is 314).
Furthur details of the function of each bit can be found by looking
on the interface schematic drawings.
Some definitions are:
Control bits
INTOFF - Turns off hardware integration in servo system (all joints
together).
COMP ENB -This bit allows brake bits to enable the arm servos.
Preceeds all motions.
INTON -Forces hardware integration on when set(all joints).~∃∃≥∧A)=_A∪≥P\[ ]¬EYKf↓iQJAQ←YKe¬]GJA ShAS9iKeeUah@QI "A∧$\~∃ 9∧A)∨Uπ⊂A∪9(\[ 9CEYKLAiQJ↓i←kG AgK]M←dAS9iKeeUah@QI "A∧$\~∃/%
A)=_@ZA¬eZAg∃em←f↓oSiP↓G←CeMJAa←MSiS←9S]NA¬GGke¬Gr~∀4∃¬eC-JAESQfZ@AQQSfA ShAe∃YKCg∃fAEe¬WJA←8AU←S9hAC]⊂AK]C YKfA)←S]h↓gKem<~∀∩PDAaKd↓U←S]PR\~∀$∩~∃)=YKeC9GJA¬%ifZAQQKgJ↓ESifAgSO9CXAo!K\AU=S]hA!CfAM%]SgQ∃H@A[=mS]N↓i↑~∀%IKgSIKHAC9OYJ\A≥←e5CXAi=YKeCce is about 1 A/D bit, Coarse
tol. is about 20 A/D bits.
Sensor Bits- These bits come up when touch sensors, or other binary
devices switch.
STOP or PANIC BIT- Set by pushing STOP button on hand unit- stops arm
immediately.
MODE Bit- Selects either Position or Current Servo. 1 per joint.
Normal is Position Servo. Current servo used when running in
software servo mode (no software supplied for this mode).
PRELIMINARIES
Modifications to bare MDB-11WWB board.
ALL COMPONENTS ARE ADDED TO PIN SIDE OF BOARD AND SOLDERED ON OPPOSITE SIDE.
TRACE MODIFICATIONS
TOP (PIN) SIDE
Cut GND Buss jumper to pin 8 on 9E,9F,9H,10E,10F,10H, AND ALL LSI SOCKETS.
BOTTGM SIDE
Cut jumpers between pins 7 and 8 on all 16 pin sockets EXECPT 1H, 2C, 2E, 2H, 3E, 5F, 3F.
Cu@P@VjA +'&A)k[aKHAi↑AAS\@bXA←\@s
X@e X@s X@ba_X@ba XAβ≥⊂Aβ→_↓→'∩AM∨π↔ Q&\~∀4∀~∃π¬!βπ∪Q∨%&T4∀~∃β⊃H@\`DACqS¬XAYK¬HAEsACgfA
CafA%\ACY0A ∪ ↓g←GW∃hAaY¬GKfA∃1 π!P@s
Xe Xs⊂0ba
XDa XbA⊂\~∀4∃βIHddA[→HAiC9iCYk4AGCaLACY←9OgSI∀@baα0@baλ0@ba 8~∀~∃¬IH@b↓[MH\↓iC]i¬YkZA
Caf\↓S\@bDAaYC
KfACLAgQ←]\AS\↓gkaa1SKHAMWKiG \~∀~(~∃π∨9≥ π)=%&~∀4∃βIHdA¬ I∞@j`↓aS\AM←GWKQfA←\↓⊃β≥ 1
A ≥
A∨ ↓¬∨β%⊂~∀~∃¬IH@d↓¬ %∞h`Aa%\Ag←
WKif↓←\A DXA h↓ ∂
↓∨ A¬=β%λ\A¬∪βLA)∨/¬% &A1β¬ →L@E bλAβ≥λE hD8~∀~∀4∃'∨π- )&~(~∃βI⊂@bhAAS\A)$Ag←G-KifA]SiPA9∨)π⊂↓β≥λA ∪β&AQ∨/β%⊃&AπβIλA⊃β9 → &↓'∪
↓S\Ai!J~∀∪→←YY←]S]NA1←GCi%←]f\@eεXg
X@M X@c X@e⊂0@e
Xk XA¬]HAC1XA←i!Kd@bPAaS\4∀∪aCQiKe\↓Y←GCQS←]f↓←\AE=CeH\4∀~∃β⊃H@bl↓aS\A¬+∂β(↓g←GW∃ifAS8AiQJ↓M←YY=oS]N↓Y←GCQS←]f4@s
Xs X@e⊂X@bA X@bA⊂\~∀4∃βIHblAa%\A)∩↓g←GW∃ifAS8ACYX↓←iQKH@blAAS\Aa¬iiKe8AaYC
Kf\~(~∃βI⊂A→'∩↓g←GW∃hAgiISafAAKdAgUaaYS∃HAgW∃iGP\4∀→π∨≠A∨≥ ≥Q&A% E+∪% ⊂~∀~∀~∃ ∪≥∪)β_↓∪≥) ≥%β) ⊂Aπ∪%
+∪)&4∀@~∀\i→&`@∩b~∀\i→&`P∩d~∀\i→&``∩b~∀\hbl∩H~∀nhDn∩d~(ni→&L`∩d~(ni→&\h∩l~(ni→&Ddf∩f4∀nhbTj∩d~(ni→&Hjn∩h%
∪%'PA- %M∪∨≤A!β&@nPbjnA%≥') ¬λQ]←PAkgK⊂A]←n$\~∀nQ→&bnP∩d`~(~∀~∃¬≥β→∨≤Aπ∨≠A∨≥ ≥Q&~∀~)⊃∩bZ@j`qα4j@∩iAπ&\@!⊃β%%%&@pA
⊃β≥≥∃_A≠+`\R~∃1~fb`$∩c!ε8@@Q¬U
$↓β≠ \$~∃ β Zp`∩$q!π&8@Q¬+I$[¬%=/≤@bHA¬∪(↓ βπ&8R~∃β⊃εZp`$∩bAε8@@Q¬U%$A¬I∨/≤@DdA¬∪PAα←λ$~∃¬K
W[C\↓%KgSMi←dA⊃S`Z@`rpZb5$b\k,~∀~∀4∃!β'M∪-
A
∨≠!∨9 ≥)&4∀~∀b↓[MH\↓)C]i¬YkZA
Caf\$bdAa
f\~∀HdA[M⊂\A)C9iCYk4AπCaL\∩fAAGf\~(\`bA5MH\A¬qSCX↓GKeC5SF∩hTAaGf8~∀→β≥β1∨∞A!=/ $~(~∀VbT~∀@@A&∩q⊂bn@@~∀∩s∀r~∀∩e
bj~(∩s bL~∀∩s bf~∀$ba bL~∀∩bA⊂bf~(~∀∪ b~∀∩Qαdd~(∩i∧dH~∀∩i dd~∀$iλdd4∀∩i
Hd~∀~(∪
⊂b4∀∩qαHd~∀∩a∧dd~(∩qεdH~∀@@A&∩q⊂bn~∀4∀Zbj4∀@@@↓&∩qλHj~∀∩e
b`~(∩s
h4∀∩s L~∀∩s f~∀∩Da f~(∩ba⊂L~∀~∀%
b~(∩iαbP~∀∩iλbh~∀$iεbh4∀∩iλDh~∀∩Q
bh~(~∀~∀%
b~(∩qαbP~∀∩qλbh~∀$qεbh4∀@@@A&∩q⊂dj~∀4∀Vj@A'∨→⊃ $A∪9 ∪-∪⊃+β→→dA)≡@,k,A¬U'&@Q ∨))∨4A'∪ ∀R~∀~)&∩iαDf~∃&$i∧bf4∃&∩i bf~∃L∩iλbL~∃&∩Q
bf~)&∩qαDf~∃&$q∧bf4∃&∩q bf~∃L∩qλn4∃&∩q⊂r~∀~(~∃∂≥⊂~∀∩s∀n~∀∩e
p~∀$s bh4∀∩s⊂Dh~∀∩Da bh4∀∩ba bh~∀@A&∪≥≥λA≥∃β$@q⊂bj~∀4∀~∃∂9λZA'=→ $↓∪≥ ∪Y∪ +β1→2A)<A∂≥λ8A¬+'LZ@Q)= A'∪⊃
R~∀4∃&∩i∧db~∃L∩i∧dD~∃&∩Qεdb~)&∩iλHb~∃&$i
db4∃&∩q∧db~∃L∩q∧dD~∃&∩aεdb~)&∩qλD`~∃&$qλbj4∀~∀~)⊃←YH↓ ←o]L@Q]↑↓←iQKHAMk]
iS←\4AS]gQCYXA1CghR4∀~∀∩Y⊂bh~(∩k⊂bP~∀~∀HA!→β
&A∨8Aπβ%⊂A ∂∀Aπ∨≥9 π)∨H@QS]MiCYX↓YCgh$~∀~∀4∀→∨+(``A∧4∀∩e
H~∀∩k∀f~∀∩Uλf~∀$kεf~(∩k∧f4∀∩m∧L~∀∩sλf~∀∩eεf~∀$sλf~(~∀~∃=+(@`DA∧~∀$e
h~(∩k
h4∀∩kλP~∀∩k h~∀∩U∧h~∀$m∧h~(∩s∧h4∀∩sεP~∀∩s⊂h~∀∩4∀~∃∨U(@`d↓∧~∀∩I
l~∀$k
l~(∩kλl4∀∩kεX∩~∀∩U∧l~∀$m∧l~(∩s∧l4∀∩sεX~∀∩s⊂l~∀∩4∀~∃∨U(@`f↓∧~∀∩I
b`~(∩k
bP~∀∩k⊂bh~∀$kεbh4∀∩k∧Dh~∀∩Y∧bh~(∩s∧bP~∀∩s bh~∀$sλbh4∀∩~∀4∃∨+(`hA∧4∀∩e
Dd~∀∩U
bf~(∩kλbL~∀∩k bf~∀$k∧bf4∀∩m∧Df~∀∩e∧bf~(∩sεbL~∀∩s⊂bf~∀→∨+(`jA∧4∀∩e
Dh~∀∩U
bb~(∩kλbD~∀∩k bb~∀$k∧bb$~∀∩mλbb~∀$s∧bb4∀∩sεDb~∀∩eλbb~(~∀~∃=+(@`XA∧~∀$g
d~(∩mλf4∀∩mεL~∀∩oλf~∀∩]εf~∀$oλf~(∩baλL~∀∩bAεf~∀$ba∧f4∀∩~∀4∃∨+(`nA∧4∀∩g
P~∀∩m⊂h~∀∩Yεh~∀$o∧h~(∩oεh4∀∩oλP~∀∩bAλh~∀$baεh4∀∩baλh~∀∩4∀~∃∨U(@`p↓∧~∀∩M
l~∀$mλl~(∩mεl4∀∩o∧X~∀∩o l~∀∩]λl~∀$baλl4∀∩ba l~∀∩Da∧l~(~∀~∃=+(@`dA∧~∀$g
b`4∀∩mλDh~∀∩Yεbh~(∩o∧bP~∀∩o bh~∀$oλbh4∀∩ba⊂bh~∀$baεbP~∀∩bA∧bh~(→∨+(b`A∧4∀∩g
Dd~∀∩Yλbf~(∩mεbL~∀∩oλbf~∀$oεbf4∀∩oλDf~∀∩Daλbf4∀∩ba bf~∀$ba∧bL~∀∩~(~∃∨+P@bbAλ~∀∩g∀bh~∀$kαbd4∀∩kαH~∀∩m∧bd~∀$mαd~(∩oαd4∀∩oαDd~∀∩Daαd~(∩baαDd~∀~(~∃∨+P@bdAλ~∀∩m⊂bb~∀$mεbb4∀∩o∧Db~∀∩]εbb~(∩oλbD~∀∩bAλbb~(∩baεDb~∀∩Da∧bb4∀→')∨@Aα~∀$c
b~(∩e b4∀∩c D~∀∩e d~∀∩Uαb~∀$kαbf4∀∩k∧D~∀∩mλb~∀∩]∧b~∀$oεb~(∩~∀~)')∨ ↓∧~∀∩Iεh~∀$kλb~(∩oλb4∀∩mεD~∀∩k b~∀∩Yαb~∀$mαbf4∀~∀~)')∨ ↓ε~∀∩Iεl~∀$k
b~(∩mλb4∀∩oαD~∀∩o∧bf~∀$s∧b~(∩ba∧D~∀~∀4∃')∨@@Z~∀$e∧bf4∀∩eαD`~∀∩Daαb~(∩baαDf~∀∩Daεb~(∩sεb4∀∩sλD~∀∩bAλb~∀$~∀ BRAKE OUT
BOUT00 1F2
1H1
BOUT01 1F5
1H3
BOUT02 1F7
1H5
BOUT03 1F15
1H11
BOUT04 1F12
1H13
BOUT05 1F10
1H15
BOUT06 2F2
2H3
BOUT07 2F5
6H11
BOUT08 2F7
2H11
BOUT09 2F15
3F15
BOUT10 2F12
3B2
BOUT11 2F10
2C11
BOUT12 1E2
3F11
BOUT13 1E5
3F13
MODE BUFFERS
7B10
3H1
7C10
3H3
6C10
3H5
7D10
3H9
6D10
3H11
10B10
3H13
10C10
3F1
10D10
3F3
LD DACS
1D9
5A3
6B9
7B9
1D10
5A11
5B9
7C9
1D11
6A3
5C9
6C9
1D12
6A11
5D9
7D9
1D7
5E9
6D9
7A3
1D6
7A11
9B9
10B9
1D5
9C9
10C9
10A3
1D4
9D9
10D9
10A11
LOAD DACS
1C7
1D2
1D15
LOAD BRAKES
1C6
1F9
2F9
1E9
LOAD AD MPX
1C5
2D9
2B10
1A12
RD AD
1C12
2C13
1A9
6E1
6F1
7E1
7F1
¬RD AD
2C12
1A4
STOP X
2B4
2C1
2C3
2C5
INT CTRL[TOL]
2A5
1A1
INT CTRL[TOUCH]
2A8
1A2
6H6
3A3
2C14
3A1
1A11
2C15
1A8
1A13
1A6
2A4
2A13
3B4
2A3
3B12
2A11
5F10
3B1
2A2
5H8
3B10
2A12
2C10
3B9
GNDS
6H9
6H7
2B1
2C8
2B9
1B8
3D9
2D8
GND
1C2
1C15
1C14
1C8
GND 7F3
7F6
7F8
7F10
7F13
HI
6H8
10A4
10A10
7A4
7A10
6A4
6A10
5A4
5A10
3A4
3A2
2A1
2B11
3B11
3B3
2D1
3D11
PANIC
5H12
7E14
2B3
READ BITS MUX
6E15
7E15
6F15
7F15
6H12
6H13
1C10
ONE-SHOT TIMING
3C16
3C14
3C12
3B15
3C5
3B14
3C11
3B7
3C3
3B6
3C13
2B7
3C1
2B6
3C15
2B15
1B15
2B14
1B9
AD OUTPUTS
S 8D27
6E3
S 8D28
6E6
S 8D29
6E10
S 8D30
6E13
S 8D31
7E3
S 8D32
7E6
S 8D1
7E10
S 8D2
7E13
S 8D3
6F3
S 8D4
6F6
S 8D5
6F10
S 8D6
6F13
MPXR ADDRS
2D2
9F1
9H1
10H1
10F1
10E1
2D5
9F16
9H16
10H16
10F16
10E14
2D7
9F15
9H15
10H15
10F15
10E15
2D10
6H1
7H5
7H13
2D12
6H3
7H9
7H12
6H2
7H2
7H10
6H4
7H1
7H4
7H11
9H2
10E13
7H8
9F2
10E12
7H6
10H2
10E3
7H3
10F2
10E2
MPXR OUT[ANALOG]
9H8
10H8
10F8
9F8
9E3
9E14
S 8D14
S 8D22
6H5
3D5
S 8D18
3D10
2B12
3D7
3C7
DATA OUT
OUT00 2E1
2D3
1F3
OUT01 2E3
2D4
1F4
OUT02 2E5
2D6
1F6
OUT03 2E11
2D11
1F14
OUT04 2E13
2D13
1F13
OUT05 2E15
1F11
OUT06 3E1
2F3
OUT07 3E3
2F4
OUT08 3E5
2F6
OUT09 3E11
2F14
OUT10 3E13
2F13
OUT11 3E15
2F11
OUT12 1E3
6D11
OUT13 1E4
1D13
OUT14 1E6
1D3
OUT15 1D1
1D14
1E14
1A5
1A10
1C1
2B2
S 8D11
S 8D12
S 8D21
S 8D20
S 8D19
+5VDC
MISC. WRAPS
5F1
6F2
5F2
6F5
5F3
6F11
5F4
6F14
5F5
7F2
5F6
7F5
5F13
7F11
5F14
7F14
5H1
6E2
5H2
6E5
5H3
6E11
5H4
6E14
5H5
7E2
5H6
7E5
5H11
7E11
CONNECTOR WIRING -P2
Connector P2 - 50 pin- Digital Signals Only
FROM TO FUNCTION
P2
1 GND
2 5F14 TOLERANCE BIT 07 IN TOLERANCE = HIGH
3 5F13 TOLERANCE BIT 06
4 5F6 TOLERANCE BIT 05
5 5F5 TOLERANCE BIT 04
6 5F4 TOLERANCE BIT 03
7 5F3 TOLERANCE BIT 02
8 5F2 TOLERANCE BIT 01
9 5F1 TOLERANCE BIT 00
10 GND
11 5H12 PANIC (LOW =PANIC)
12 5H11 TOUCH 06 (COMPUTER MODE ENABLED =HI)
13 5H6 TOUCH 05 (TOUCH =LOW)
14 5H5 TOUCH 04
15 GND
16 5H4 TOUCH 03
17 5H3 TOUCH 02
18 5H2 TOUCH 01
19 5H1 TOUCH 00
20 GND
21 3F4 MODE 07 (CURRENT/POSITION) POSITION =HI
22 3F2 MODE 06
23 3H12 MODE 05
24 3H10 MODE 04
25 GND
26 3H8 MODE 03
27 3H6 MODE 02
28 3H4 MODE 01
29 3H2 MODE 00
30 GND
31 SPARE
32 SPARE
33 3F12 BRAKE 13 HAND IMPACT MODE- IMPACT=LOW
34 3F10 BRAKE 12 WIDE TOLERANCE REGION- WIDE=LOW
35 GND
36
37
38 3F14 BRAKE 09 "INTON"-REMOTE INTEGRATE TURN ON = LOW
39 2H10 BRAKE 08 COMPUTER MODE -STEP HI =ENABLE, LOW=DISABLE
40 GND
41 6H10 BRAKE 07 "INTOFF"-INTEGRATOR SHUNT, LOW=INTEGRATE OFF
42 2H4 BRAKE 06 HAND ENABLE , HI=HAND ENABLED
43 1H14 BRAKE 05 JOINT 6, HI=JOINT ENABLED
44 1H12 BRAKE 04 JOINT 5, HI=BRAKE OFF AND JOINT ENABLED
45 GND
46 1H10 BRAKE 03 JOINT 4, HI=BRAKE OFF AND JOINT ENABLED
47 1H6 BRAKE 02 JOINT 3, HI=BRAKE OFF AND JOINT ENABLED
48 1H4 BRAKE 01 JOINT 2, HI=BRAKE OFF AND JOINT ENABLED
49 1H2 BRAKE 00 JOINT 1, HI=BRAKE OFF AND JOINT ENABLED
50 GND
CONNECTOR WIRING -P3
Connector P3 - 50pin- Analog Signals only
FROM TO FUNCTION (TP=TWISTED PAIR-GROUND BOTH ENDS OF ONE WIRE)
P3
1 GND
2 8C15 TP DAC 07 SPARE 12 BIT DAC, OUTPUT RANGE +-10VDC.
3 8B15 TP DAC 06 HAND DAC OUTPUT
4 8A15 TP DAC 05 JOINT #6 DAC OUTPUT
5 4E15 TP DAC 04 JOINT #5 DAC OUTPUT
6 4D15 TP DAC 03 JOINT #4 DAC OUTPUT
7 4C15 TP DAC 02 JOINT #3 DAC OUTPUT
8 4B15 TP DAC 01 JOINT #2 DAC OUTPUT
9 4A15 TP DAC 00 JOINT #1 DAC OUTPUT
10 GND
11 9H9 A/D 31 SPARE A/D CHANNEL(12 BIT, +-10VDC RANGE)
12 9H10 A/D 30 SPARE
13 9H11 A/D 29 SPARE
14 9H12 A/D 28 SPARE
15 GND
16 9H7 A/D 27 SPARE
17 9H6 A/D 26 SPARE
18 9H5 A/D 25 SPARE
19 9H4 A/D 24 SPARE
20 GND
21 9F9 A/D 23 SPARE
22 9F10 A/D 22 HAND MOTOR CURRENT
23 9F11 A/D 21 JOINT #6 MOTOR CURRENT
24 9F12 A/D 20 JOINT #5 MOTOR CURRENT
25 GND
26 9F7 A/D 19 JOINT #4 MOTOR CURRENT
27 9F6 A/D 18 JOINT #3 MOTOR CURRENT
28 9F5 A/D 17 JOINT #2 MOTOR CURRENT
29 9F4 A/D 16 JOINT #1 MOTOR CURRENT
30 GND
31 10H9 A/D 15 SPARE
32 10H10 A/D 14 HAND TACHOMETER
33 10H11 A/D 13 JOINT #6 TACH
34 10H12 A/D 12 JOINT #5 TACH
35 GND
36 10H7 A/D 11 JOINT #4 TACH
37 10H6 A/D 10 JOINT #3 TACH
38 10H5 A/D 09 JOINT #2 TACH
39 10H4 A/D 08 JOINT #1 TACH
40 GND
41 10F9 A/D 07 SPARE
42 10F10 A/D 06 HAND POTENTIOMETER
43 10F11 A/D 05 JOINT #6 POT
44 10F12 A/D 04 JOINT #5 POT
45 GND
46 10F7 A/D 03 JOINT #4 POT
47 10F6 A/D 02 JOINT #3 POT
48 10F5 A/D 01 JOINT #2 POT
49 10F4 A/D 00 JOINT #1 POT
50 GND
CONNECTOR WIRING -P1
Connector P1 - 40 pin - To connector J1 on DRV-11
From To
P1
1 1C1 NEW DATA READY
2 GND
3
4 GND
5
6 GND
7 2E5 OUT 02
8 GND
9 3A5 REQ A
10 GND
11 1D14 OUT 15
12 1D3 OUT 14
13 1D13 OUT 13
14 GND
15 1C3 CSR 1
16 GND
17 1E3 OUT 12
18 3E15 OUT 11
19 3E13 OUT 10
20 GND
21 3E11 OUT 09
22 3E5 OUT 08
23 GND
24 2E11 OUT 03
25 3E3 OUT 07
26 GND
27 3E1 OUT 06
28
29 2E15 OUT 05
30 GND
31 2E13 OUT 04
32 2E3 OUT 01
33 GND
34
35 1C10 READ ENCODERS (TO ENCODER BOARD) RD ENCD
36
37 1C4 LOAD ENCODERS (TO ENCODER BOARD) LD ENCD
38 2E1 OUT 00
39
40
CONNECTOR WIRING -P4
Connector P4 - 40 pins - To connector J2 on DRV-11
From To Function
P4
1
2 GND
3 6E4 IN00
4 GND
5
6 GND
7
8 GND
9 6E7 IN01
10 7E4 IN04
11 GND
12 7E7 IN05
13
14 7E9 IN06
15 GND
16 7E12 IN07
17 6E12 IN03
18 GND
19 6F4 IN08
20 6F7 IN09
21 GND
22 6F9 IN10
23 6F12 IN11
24 7F4 IN12
25 GND
26 1A3 REQ B
27 GND
28 7F7 IN13
29 7F9 IN14
30 7F12 IN15
31 GND
32 1C13 CSR0
33 GND
34 6E9 IN02
35
36
37
38 1A5 DATA TRANSMITTED
39
40
DAC CONNECTIONS -D0
DAC D0
FROM TO
6B2 4A12
6B5 4A11
6B7 4A10
6B15 4A9
6B12 4A8
6B10 4A7
7B2 4A6
7B5 4A5
7B7 4A4
7B15 4A3
7B12 4A2
5A6 4A1
4A15 4A19
4A24 4A16
4A20 4A17
DAC CONNECTIONS -D1
DAC D1
FROM TO
5B2 4B12
5B5 4B11
5B7 4B10
5B15 4B9
5B12 4B8
5B10 4B7
7C2 4B6
7C5 4B5
7C7 4B4
7C15 4B3
7C12 4B2
5A8 4B1
4B15 4B19
4B24 4B16
4B20 4B17
DAC CONNECTIONS -D2
DAC D2
FROM TO
5C2 4C12
5C5 4C11
5C7 4C10
5C15 4C9
5C12 4C8
5C10 4C7
6C2 4C6
6C5 4C5
6C7 4C4
6C15 4C3
6C12 4C2
6A6 4C1
4C15 4C19
4C24 4C16
4C20 4C17
DAC CONNECTIONS -D3
DAC D3
FROM TO
5D2 4D12
5D5 4D11
5D7 4D10
5D15 4D9
5D12 4D8
5D10 4D7
7D2 4D6
7D5 4D5
7D7 4D4
7D15 4D3
7D12 4D2
6A8 4D1
4D15 4D19
4D24 4D16
4D20 4D17
DAC CONNECTIONS -D4
DAC D4
FROM TO
5E2 4E12
5E5 4E11
5E7 4E10
5E15 4E9
5E12 4E8
5E10 4E7
6D2 4E6
6D5 4E5
6D7 4E4
6D15 4E3
6D12 4E2
7A6 4E1
4E15 4E19
4E24 4E16
4E20 4E17
DAC CONNECTIONS -D5
DAC D5
FROM TO
9B2 8A12
9B5 8A11
9B7 8A10
9B15 8A9
9B12 8A8
9B10 8A7
10B2 8A6
10B5 8A5
10B7 8A4
10B15 8A3
10B12 8A2
7A8 8A1
8A15 8A19
8A24 8A16
8A20 8A17
DAC CONNECTIONS -D6
DAC D6
FROM TO
9C2 8B12
9C5 8B11
9C7 8B10
9C15 8B9
9C12 8B8
9C10 8B7
10C2 8B6
10C5 8B5
10C7 8B4
10C15 8B3
10C12 8B2
10A6 8B1
8B15 8B19
8B24 8B16
8B20 8B17
DAC CONNECTIONS -D7
DAC D7
FROM TO
9D2 8C12
9D5 8C11
9D7 8C10
9D15 8C9
9D12 8C8
9D10 8C7
10D2 8C6
10D5 8C5
10D7 8C4
10D15 8C3
10D12 8C2
10A8 8C1
8C15 8C19
8C24 8C16
8C20 8C17